T239 - Revision history

Retr0id: Reformat specs into table

2025-06-28T21:01:00Z

Reformat specs into table

← Older revision		Revision as of 01:01, 29 June 2025
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	NVIDIA T239 SoC ~~Specifications~~		The NVIDIA T239 is a custom SoC designed to Nintendo's specifications. It has many aspects in common with the T234 SoC found in NVIDIA Orin products.

	CPU		== Specifications ==
	* Eight 64-bit ARM Cortex [https://developer.arm.com/Processors/Cortex-A78C A78C] cores		{\| class="wikitable"
			\|+
	Cache		!Component
	* 4 MB Shared L3 Cache, 256KB L2 Cache per core, 64KB/64KB (I/D) L1 Cache per core		!Description
			\|-
	Memory ~~Frequency~~		\|CPU
	* LPDDR5X-3200, 128-bit (102 GB/s)		\|Eight 64-bit ARM Cortex [https://developer.arm.com/Processors/Cortex-A78C A78C] cores
			\|-
	Memory Size		\|Cache
	* 12 GB		\|4 MB Shared L3 Cache, 256KB L2 Cache per core, 64KB/64KB (I/D) L1 Cache per core
			\|-
	GPU		\|Memory Bus
	* Cores 1536-core Ampere GPU		\|LPDDR5X-3200, 128-bit (102 GB/s)
			\|-
			\|Memory Size
			\|12GB (2x 6GB)
			\|-
			\|GPU
			\|1536-core Ampere GPU
			\|}

	== Notable Security Features ==		== Notable Security Features ==

Retr0id: Memory Encryption caveat

2025-06-28T20:39:21Z

Memory Encryption caveat

← Older revision		Revision as of 00:39, 29 June 2025
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	It is likely that encryption is tweaked on a per-physical-address basis. So, an attacker with control of the external memory bus cannot e.g. relocate data from one address to another.		It is likely that encryption is tweaked on a per-physical-address basis. So, an attacker with control of the external memory bus cannot e.g. relocate data from one address to another.

	There is no memory authentication, however. So in the event of external memory tampering, the CPU will read back garbled plaintext (effectively, random bytes).		There is no memory authentication, however. So in the event of external memory tampering, the CPU will read back garbled plaintext (effectively, random bytes). Although, it should in principle be possible to "replay" earlier values from a particular address.

	=== XOM (eXecute-Only-Memory) ===		=== XOM (eXecute-Only-Memory) ===
	At present it is unknown if/where XOM is used, but the hardware does support it.		At present it is unknown if/where XOM is used, but the hardware does support it.

Retr0id: Document existence of XOM

2025-06-28T20:29:07Z

Document existence of XOM

← Older revision		Revision as of 00:29, 29 June 2025
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	There is no memory authentication, however. So in the event of external memory tampering, the CPU will read back garbled plaintext (effectively, random bytes).		There is no memory authentication, however. So in the event of external memory tampering, the CPU will read back garbled plaintext (effectively, random bytes).

			=== XOM (eXecute-Only-Memory) ===
			At present it is unknown if/where XOM is used, but the hardware does support it.

Retr0id: Document lack of memory authentication

2025-06-28T20:18:16Z

Document lack of memory authentication

← Older revision		Revision as of 00:18, 29 June 2025
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	It is likely that encryption is tweaked on a per-physical-address basis. So, an attacker with control of the external memory bus cannot e.g. relocate data from one address to another.		It is likely that encryption is tweaked on a per-physical-address basis. So, an attacker with control of the external memory bus cannot e.g. relocate data from one address to another.

			There is no memory authentication, however. So in the event of external memory tampering, the CPU will read back garbled plaintext (effectively, random bytes).

Retr0id: Document PAC, Memory Encryption

2025-06-28T20:10:26Z

Document PAC, Memory Encryption

@@ Line 2: / Line 2: @@
 CPU
-* Eight 64-bit ARM Cortex A78C cores
+* Eight 64-bit ARM Cortex [https://developer.arm.com/Processors/Cortex-A78C A78C] cores
 Cache
@@ Line 15: / Line 15: @@
 GPU
 * Cores 1536-core Ampere GPU

TheOfficialGMan: Add initial T239 page with known specifications

2025-06-27T19:54:56Z

Add initial T239 page with known specifications

New page

NVIDIA T239 SoC Specifications

CPU
* Eight 64-bit ARM Cortex A78C cores

Cache
* 4 MB Shared L3 Cache, 256KB L2 Cache per core, 64KB/64KB (I/D) L1 Cache per core

Memory Frequency
* LPDDR5X-3200, 128-bit (102 GB/s)

Memory Size
* 12 GB

GPU
* Cores 1536-core Ampere GPU