Hardware: Difference between revisions

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=== DRAM Layout ===

The footprint is BGA-441, as defined by JEDEC [https://www.jedec.org/standards-documents/docs/jesd209-5c JESD209-5C] (LPDDR5X). This annotated image shows the signals routed on the top layer of the PCB, for the IC south of the SoC. The signals routed here are CS0-1, CA0-6, and CK, for each of the four channels.

The footprint is BGA-441 (JEDEC [https://www.jedec.org/standards-documents/docs/mo-342a MO-342]), with ballout defined by JEDEC [https://www.jedec.org/standards-documents/docs/jesd209-5c JESD209-5C] (LPDDR5X). This annotated image shows the signals routed on the top layer of the PCB, for the IC south of the SoC. The signals routed here are CS0-1, CA0-6, and CK, for each of the four channels.

[[File:Dram traces annotated.jpg|frameless|619x619px]]

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! Component || Description

|-

| SoC || NVIDIA GMLX30-A1

| SoC || NVIDIA GMLX30-A1 ([[T239]])

|-

| Screen || Innolux ZD079KA-03A

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Samsung K3KL2L20DM-JGCT 6 GB LPDDR5X DRAM x2 (12GB total)

|-

| Wifi/BT || MediaTek MT3681AEN

| Wifi/BT || MediaTek MT3681AEN (same footprint and similar pinout to [https://www.digikey.com/en/products/detail/mediatek/MT7921LEN-B/24633572 MT7921LEN])

|-

| PMIC || Maxim Integrated MAX77851SAWJ+T

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| Voice || Intelligo Technology IG2200

|-

| USB 2.0 Hub || Genesys Logic GL852G-OHY60

| USB 2.0 Hub || Genesys Logic GL852G-OHY60 (Connects to joycons, WiFi/BT IC, with upstream port to SoC)

|-

| USB-C || Cypress CYPD6228-96BZXI (CP10359AT)

@@ Line 9: / Line 9: @@
 === DRAM Layout ===
-The footprint is BGA-441, as defined by JEDEC [https://www.jedec.org/standards-documents/docs/jesd209-5c JESD209-5C] (LPDDR5X). This annotated image shows the signals routed on the top layer of the PCB, for the IC south of the SoC. The signals routed here are CS0-1, CA0-6, and CK, for each of the four channels.
+The footprint is BGA-441 (JEDEC [https://www.jedec.org/standards-documents/docs/mo-342a MO-342]), with ballout defined by JEDEC [https://www.jedec.org/standards-documents/docs/jesd209-5c JESD209-5C] (LPDDR5X). This annotated image shows the signals routed on the top layer of the PCB, for the IC south of the SoC. The signals routed here are CS0-1, CA0-6, and CK, for each of the four channels.
 [[File:Dram traces annotated.jpg|frameless|619x619px]]
@@ Line 19: / Line 19: @@
 ! Component || Description
 |-
-| SoC || NVIDIA GMLX30-A1
+| SoC || NVIDIA GMLX30-A1 ([[T239]])
 |-
 | Screen || Innolux ZD079KA-03A
@@ Line 29: / Line 29: @@
 Samsung K3KL2L20DM-JGCT 6 GB LPDDR5X DRAM x2 (12GB total)
 |-
-| Wifi/BT || MediaTek MT3681AEN
+| Wifi/BT || MediaTek MT3681AEN (same footprint and similar pinout to [https://www.digikey.com/en/products/detail/mediatek/MT7921LEN-B/24633572 MT7921LEN])
 |-
 | PMIC || Maxim Integrated MAX77851SAWJ+T
@@ Line 39: / Line 39: @@
 | Voice || Intelligo Technology IG2200
 |-
-| USB 2.0 Hub || Genesys Logic GL852G-OHY60
+| USB 2.0 Hub || Genesys Logic GL852G-OHY60 (Connects to joycons, WiFi/BT IC, with upstream port to SoC)
 |-
 | USB-C || Cypress CYPD6228-96BZXI (CP10359AT)